Thumb offers the designer
- Excellent code-density for minimal system memory size and cost 32-bit performance from 8- or16-bit memory on an 8- or 16-bit bus for low system cost.
- Plus the established ARM features
- Industry-leading MIPS/Watt for maximum battery life and RISC performance
- Small die size for integration and minimum chip cost
- Global multi-partner sourcing for secure supply.
Designers can use both 16-bit Thumb and 32-bit ARM instructions sets and therefore have the flexibility to emphasise performance or code size on a sub-routine level as their applications require.
A "Thumb-aware" core is a standard ARM processor fitted with a Thumb decompressor in the instruction pipeline. The designer therefore gets all the underlying power of the 32-bit ARM architecture as well as excellent code density from Thumb, all at 8-bit system cost.
Thumb has better code density than common 8 and 16-bit CISC/RISC Controllers and is at a fraction of the code size of traditional 32-bit architectures. This means that program memory can be smaller and hence cost reduced.
The Thumb architecture is supported by a complete Windows software development environment as well as development and evaluation cards.
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